Judging by details revealed in a chip conference agenda, the clock frequency race isn't over yet.
IBM's Power6 processor will be able to exceed 5GHz (five gigahertz) in a high-performance mode, and the second-generation Cell Broadband Engine processor from IBM, Sony and Toshiba will run at 6GHz, according to the programme for the International Solid State Circuits Conference that begins 11 February in San Francisco.
Chipmakers have run into problems increasing chip clock speed — essentially an electronic heartbeat that synchronises operations in a processor — because higher frequencies have led to unmanageable power consumption and waste heat.
To compensate, Intel and AMD have turned instead to the addition of multiple processing cores on each slice of silicon. That's effective when computers are juggling numerous tasks at the same time, but increasing the clock speed means an individual task can run faster.
The first-generation Cell Broadband Engine chip, co-developed by IBM, Sony and Toshiba, has just appeared in Sony's PlayStation 3 game console and can run at 4GHz. The second-generation chip will run at 6GHz, according to the ISSCC program. In addition, the new chip will have a dual power supply that increases memory performance — a major bottleneck in computer designs today.
For servers, IBM has said its Power6 processor, due to ship in servers in 2007, will run between 4GHz and 5GHz. But in the ISSCC program, IBM said the chip's clock will tick at a rate "over 5GHz in high-performance applications". In addition, the chip "consumes under 100 watts in power-sensitive applications", a power range comparable to mainstream 95-watt AMD Opteron chips and 80-watt Intel Xeon chips.
Power6 has 700 million transistors and measures 341 square millimetres, according to the programme. The smaller a chip's surface area, the more can be carved out of a single silicon wafer, reducing per-chip manufacturing costs and therefore making a computer more competitive. Power6, like the second-generation Cell, is built with a manufacturing process with 65nm (nanometre) circuitry elements, allowing more electronics to be squeezed onto a given surface area.
Intel isn't standing idly by, though. In September, Intel showed a glimpse of a prototype chip with 80 cores that can perform a trillion mathematical calculations per second. At ISSCC, the company will shed more details on the design, including an updated speed measurement of 1.28 trillion calculations per second.
The chip measures 275 square millimetres — smaller than the 303-square-millimetre area indicated in September — and runs at 4GHz, according to the programme. The chip, which Intel describes as a "network-on-chip architecture", has 100 million transistors and dissipates 98 watts of waste heat. Intel called each core a tile and said each has network switch features to route packets of data.
"It was designed as a research tool to test interconnect strategies for many-core processors," Intel spokeswoman Erica Fields said. Research goals for the project included testing new chip design methods and investigating "how to move terabytes of data rapidly between cores on-chip and between the cores and memory." She added that the prototype can't run conventional software for Intel chips.
Among other processor-related talks at the show:
- Sun will discuss its Niagara 2 processor, an eight-core design that can run 64 simultaneous sequences of instructions, called threads. The chip measures 342 square millimetres and has 500 million transistors, according to the programme.
- PA Semi, a start-up that designs chips compatible with IBM's Power designs, also plans to detail its chip, a dual-core design that consumes a maximum of 25 watts and that runs at 2GHz. The chip measures 115 square millimetres, according to the programme.
- AMD will discuss its quad-core Barcelona, due to arrive in mid-2007.
