One of the first things experts like to point out about flash is that, technically, it's contradictory. Flash chips are electrical, meaning that they need electricity to store data. Yet flash chips retain their data after the host computer or cell phone is turned off. By contrast, DRAM -- used in PCs -- loses data as soon as the computer shuts off. "(Flash) shouldn't work," said Stefan Lai, a vice president in the technology and manufacturing group at Intel. The trick lies in the fact that the gate in a flash transistor -- the microscopic on-off switch inside a flash chip -- is wrapped in a layer of silicon dioxide that prevents electrons from escaping. Depending on the charge inside, the computer reads the memory cell as a "1" or "0". The silicon dioxide insulator is so effective that a floating gate transistor (so-called because the gate "floats" above the rest of the transistor) will retain data for 10 years. New data can be written to a flash chip a million times before errors begin to occur. "Think of it as a bottle of water: Once you fill it up, the water will stay there forever," said Eli Harari, founder and chief executive of SanDisk, which makes flash memory and flash memory cards. While the insulating layer is the secret sauce in the flash recipe, it's also the source of its problems. The silicon dioxide wrappers on flash chips today measure about 90 angstroms thick -- an angstrom is one ten-billionth of a meter, or less than the width of a hydrogen atom -- and can probably be shrunk to about 80 angstroms. Any thinner, and the electrons begin to leak out, leading to data corruption or loss. In its turn, the need for thickness makes power a problem. About 10 volts must be applied to the floating gate to get electrons through in the first place -- far more voltage than is used to animate microprocessor transistors. "Because it is so well-insulated, you have to use some violence," Lai said. In addition, if the size of the chip is reduced, the voltage intended for one cell might inadvertently zap a neighbouring cell -- resulting in mis-recorded data. These problems are manageable for now. But making traditional flash chips with an average component size of 45 nanometers -- a manufacturing process that is set to begin in 2007 -- is likely to be a tough task. "We see that we will be running out of tricks at 45 nanometers," said Lai. Unresolved difficulties could have a direct economic effect. Intel, for instance, so far has been able to reduce the size of flash memory cells on chips by about 50 percent with each advance in the manufacturing process. That process allows the size of the chip to be reduced, lowering the overall manufacturing cost and increasing the amount of memory on a single piece of silicon -- thus raising its value. But early experiments indicate that chip size contracts only around 35 percent to 40 percent at 45 nanometers, Lai said. While Lai added that Intel will likely overcome these problems and accomplish a 50 percent shrink, Motorola's Chang and others are less optimistic. Samsung, Toshiba, SanDisk and others, meanwhile, say they can get past the 45-nanometer barrier by concentrating on NAND flash. Until recently, the term "flash" has been synonymous with NOR flash, the type of flash memory made by Intel and AMD. NAND flash, however, has become more popular in recent years, accounting for 20 percent of the market in 2002. "The real battleground between NAND and NOR is going to be the cell phone," said Tom Quinn, vice president of marketing for Samsung. "NAND is smaller in cell size, and it scales much more easily." Again, though, non-NAND people point out that troubles lie in the future for NAND as well: Density, power consumption and speed will all begin to be problems as time goes on. Solutions, solutions
In the end, changes in materials and architectures are needed. Unfortunately, they aren't ready yet. "Nobody has any other memory technology that is manufacturable," said Pat Gelsinger, Intel's chief technology officer. "Everybody could build something -- nobody could build lots." For its part, AMD is looking at ways to put 4 bits of information per memory cell in its MirrorBit line of flash chips. Conventional flash memory holds 1 bit per cell, while higher-priced flash can hold 2 bits per cell. By raising the number to four, the company can obtain the economic benefits of shrinking without actually doing it. "It wouldn't be a lithography move. It can postpone the 45-nanometer move," said Mike VanBuskirk, vice president of engineering in the memory group at AMD. Critics, including Intel and SanDisk, which make 2-bit-per-cell memory, say that electrical signalling could prove problematic in 4-bit memory cells, as the number of bits makes it more difficult to differentiate between the 16 combinations of "1" and "0". Motorola's proposed answer lies in silicon nanocrystals. In this plan, a lattice of crystals replaces the silicon dioxide in the insulation layer. Although silicon is traditionally an electrical conductor, at these levels the quantum nature of the material takes over and it becomes an insulator, trapping electrons. This allows Motorola to shrink the insulators and so the size of the cell. "We think we can achieve the same density with half the area," said Chang. Samples could start shipping to major customers by 2005, he said, with mass production following six months later. SONOS (silicon-oxide-nitride-oxide-silicon), a similar alternative that uses silicon nitride, is also cooking in Motorola's lab. What's the catch with silicon nanocrystals? Right now, Motorola is one of a few companies actively pursuing it. Intel, meanwhile, is experimenting with Ovonics Unified Memory, an energy-efficient technology that differs from traditional flash in that it isn't based on trapped electrons. Instead, microscopic pinpoints on a chalcogenide substrate are rapidly heated. They become either amorphous or crystallized, depending on how quickly they are cooled. The amorphous and crystallized areas exhibit different electrical resistance -- a difference that can be read as either "0" or "1". "We are making good progress," said Lai, who indicated that Intel is putting more work into Ovonics than into chips with 4-bit cells, like AMD. "The challenge now is how to get it to be very low cost." One problem, however, is maintaining the high temperatures -- up to 600 degrees Fahrenheit -- needed. Then there's polymer ferroelectric RAM (PFRAM), also known as "plastic" memory. Under this technology proposal, layers of data-recording materials are piled up into 3D chips. By going up rather than out, manufacturers can squeeze more chips out of a single wafer -- radically reducing costs. Additionally, it doesn't take much to produce using established lithography processes, making it easier to adapt to existing factories. Besides Matrix, Intel and AMD are researching polymer memory. The problem is that polymer memory records slowly. In addition, the technology as it stands now does not allow erasing and re-recording of data -- as a microscopic lightning bolt literally burns a hole in the chip developed by Matrix. The company has pushed back the release date of its first commercial chips from 2002 to 2003. Other alternatives, such as FeRAM and MRAM, are out there too. FeRAM uses very little power and has been endorsed by Texas Instruments. MRAM, which has been backed by various companies, could conceivably last forever. Detractors, though, note that both technologies are relatively large. Another drawback for MRAM, which stores data by controlling the spin of captured electrons, is that it requires a computer to detect the subtle changes in electrical resistance produced by that spin. Whether they are based on old architectures or futuristic solutions, all alternative flash technologies must fight against the billions of dollars already invested in existing manufacturing processes. Ultimately, manufacturers will likely converge on the technology that doesn't tax the bottom line. "If there is money to be made in the business," Lee said, "engineers will make it happen." A pocket guide to flash memory Fujio Masuoka first introduced the concept of flash memory in 1984 while working at Toshiba. Unlike traditional computer memory, flash is non-volatile (that is, data stays in the chip after the computer goes off) and can record data in a "flash". NOR and NAND are two competing flash memory architectures. NOR serves up data rapidly, but can't hold as much data as NAND. Intel and AMD manufacture NOR chips, which account for around 80 percent of the market. Toshiba and Samsung make NAND chips, which are growing in sales. The number of bits shipped in flash chips doubles almost every year. Revenue from flash came to $7.3 billion in 2001, and will hit $13.9 billion this year, $20.7 billion in 2005 and $43 billion in 2007, according to Semico Research.
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