Intel 'peels onion' with nanosurgery

These techniques work well in checking for logic errors, but most of the time you're more interested in finding out why your chips don't work quite as fast as you'd like. Faster chips mean fatter prices, which is an equation of intense interest, but working out which part of the circuit is the first to fail as you crank up the gigahertz introduces many more variables than just sorting out a mistake in the wiring.

Once again, physics comes to the rescue. Not only can a laser beam reflect the actions of a transistor, but it can influence them. Turn up the wick a bit and you alter the operating conditions of parts of the circuit: get a chip running just at the edge of failure and scan it with a laser, and when that laser hits the problematic part, the chip will stop working. By matching that scan with the map of the chip, and gradually altering parameters until you get just the one repeatable failure, you can highlight the miscreant.

By now, you've expended a few million dollars in custom-built test equipment, a few million more in building the chip under test in the first place, and you have a solid idea of where it's going wrong. But you still have a broken chip. In the old days, you'd puzzle out a fix, rework the design, send it back to production and wait for another iteration to come back for testing. If you were lucky, you'd then have a fully working part. You might instead just uncover another bug, and have to go into the cycle again. In Intel parlance, this is called 'peeling the onion': it can turn a good product into an expensive also-ran if schedules slip while the competition ship.

Peeling the onion is now a job for the nanosurgeons, which is a term for the engineers who edit and rewire components on-chip. This time, a beam of gallium ions is focused above the affected area on a faulty chip, and the backside etched away by combining the high-energy ions with corrosive chemicals. Faulty parts can then be eroded away completely or partially excised, and new connections formed by laying down a thin wire of metal ions to another exposed area. When a new part needs to be added, the engineers find the nearest spare -- between 1 and 3 percent of a chip is given over to these normally unused 'bonus' components -- and wire to that. The resultant patched chip can be passed back to the testers in a matter of days, and the fix verified. By cutting out the entire refabrication cycle, this can remove months of delay from the debugging process.