Montecito, an Itanium 2 that will arrive next year, will sport SpeedStep, a technology first deployed in notebooks that slows down a chip during lull periods to cut power, said Jason Waxman, a director in Intel's Enterprise Multiprocessor Platforms group. The chip will also contain a complementary technology called Foxton that will speed things up during peak periods.
Overall, Montecito will consume about 20 percent less power than current Itanium 2 chips, Waxman said.
At the same time, the chip is likely to be connected to the rest of the system with a 667MHz bus, faster than the 400MHz bus found on current Itanium 2s, and run at about 2GHz, faster than the 1.5GHz version out now, Waxman hinted. Some large Montecito machines will also contain multiple buses, an approach designed to free up the data traffic jams that can occur in 16- and 32-processor machines.
Beefing up Itanium remains one of the primary concerns at Intel. The company has spent more than a billion dollars in the past decade on chip development, server designs, venture investments and software to create a full-fledged environment for Itanium. Computers containing the chip rank among the fastest machines in the world, and sales have substantially improved in the past 18 months.
Still, Itanium holds only a fraction of the market, and analysts and competitors often assert that it will remain a niche product. An estimated 100,000 chips shipped last year. Some software developers have curtailed Itanium projects. To top it off, the market Itanium was designed to dominate, the RISC server market, is shrinking as a result of the popularity of chips like Intel's own Xeon and the Opteron from Advanced Micro Devices.
More, more, more
Other enhancements to Montecito include multithreading. The technology from the Xeon chip server line, which allows a chip to run multiple applications, will be integrated into Itanium for the first time. With multithreading, the dual-core Montecito will be able to process four applications simultaneously, compared with only one for current Itaniums.
"We have four times the number of threads, but less power (consumption)," Waxman said.
The multithreading benefit coming in Montecito will give the chip a performance boost of about 10 percent to 20 percent, he said. In comparison, IBM's simultaneous multithreading in its Power5 processors boosts performance about 30 percent, Big Blue has said.
Tukwila, the Montecito successor coming in 2007, will sport these same features but contain more processor cores and probably other enhancements. Montecito will have two cores, while Tukwila will have at least four, with plans for up to 16. Budget versions of Tukwila will be able to fit into cheaper Xeon servers, a crucial part of a plan on Intel's part to reduce customer resistance to Itanium.
Even before Tukwila, the prices had been coming down, Waxman noted. In 2002, a two-processor Itanium 2 server could cost $18,000 (£9,786). A similarly configured system today costs about $8,000, and entry-level systems can cost $2,100.
"Two years ago, customers got sticker shock," he said.
Ease of use
A third theme of Itanium's evolution is simplified management. Intel essentially is trying to make it easier to build or own a server with the chip.
Pellston technology, which will be inside Montecito, will allow a computer to kill malfunctioning sections of a chip's cache, a pool of memory embedded in the chip, and continue to use the chip. Currently, users have to replace these chips to prevent recurring errors.
Silvervale technology, meanwhile, will help boost the performance of existing virtualisation software such as EMC's VMware and Microsoft's Virtual Server, which lets a computer run several operating systems in different partitions, Waxman said. A later version arriving with Tukwila will expand to include more sophisticated partitioning technology of its own.
On other notes, Waxman reiterated that Intel is coming out soon with a version of the Itanium 2 that will have a 9MB cache and run near 1.7GHz. Current versions run at 1.5GHz and come with up to 6MB of cache.
Intel is taking pains to emphasise reliability features of the Itanium family, such as Machine Check Architecture, or MCA, which enhances a server's ability to detect computer-generated errors. Using equipment at a national laboratory, Intel bombarded Montecito servers with gamma rays and alpha particles to verify that MCA really caught errors before they caused crashes or data corruption.
The test -- essentially accelerated-wear testing -- revealed that individual chips had an average time between failures of hundreds of years, Waxman said.
CNET News.com's Stephen Shankland contributed to this report.
