The 45nm process is right on time, according to Intel.
The Santa Clara, California-based chip giant has created test chips made on the 45nm process and is likely to begin shipping processors, flash, and other chips based on that process in the second half of 2007, according to Mark Bohr, director of process architecture and integration at Intel.
The test chips, produced this month, are static 153 Mb SRAM chips. The chips contain over a billion transistors and are nearly the same size as test 18 Mb SRAM chips produced by Intel in 2000 on the then-new 130nm process. The memory cells on the 45nm test chips take up 0.346µm², compared to 2.45µm².
The nanometre measurements refer to the average size of the sub-components of the transistor. A nanometre is a billionth of a metre while a micrometer is a millionth; a human hair is about 60 to 90 micrometers in diameter.
Although these are just test chips, the milestone is an important indication that Intel's overall manufacturing strategy remains on track. However, it appears that extreme ultraviolet lithography, a future chipmaking technology championed by Intel, may get delayed.
Every two years, Intel and most other major other chipmakers shrink the size of the transistors embedded in their chips in accordance with Moore's Law. Shrinking the transistors in this manner increases overall chip performance, reduces energy consumption and cuts the manufacturing cost per chip.
By staying on a two-year cadence, a chip manufacturer can gain an advantage over a competitor by coming out with faster, less-expensive chips earlier, or at least avoid losing ground. (Moore's Law is still alive and could persist until around 2020 in its present form, although the time between transitions is likely to increase.)
Intel has exploited its manufacturing expertise to turn back rival AMD in the past. Right now, Intel is producing chips on the 65nm process, while AMD won't come out with these chips until the second half of 2006. One of the big questions for 2006 is whether Intel's latest chips and the manufacturing advantage will blunt recent gains from AMD.
The 45nm process could become particularly interesting because many chip designers believe it will be one of the more difficult transitions of recent times. The power consumption and performance requirements of these chips will be extremely high and chipmakers are being forced to add exotic materials and new structures to their transistors to ensure the chips function properly. Many, for instance, are likely to include metal or other materials in the silicon gates and gate oxide, two structures inside transistors.
"It does get a little more challenging every time, but we come up with new technology and tricks to keep things going," said Bohr.
If a company botches the process, it could lead to product delays or recalls. Some chipmakers faced these problems during the transition to 130nm chips when they swapped aluminium for copper for making interconnects — the tiny wires inside chips.
Bohr declined to state what, exactly, Intel is putting into its 45nm process. The company in the past has said tri-gate transistors and new types of gates could be included.
One clear part of the process, however, is that Intel will use dry, or standard, lithography techniques for 45nm chips. Lithography is the art of drawing circuit patterns on chips through optical and chemical processes. "We are committed to dry lithography for this [the test chips] and manufacturing," said Bohr.
Other manufacturers will adopt immersion lithography, where the silicon wafer is immersed in purified water. This helps focus the light beam from the lithography machine with greater precision. The light beam wavelength from these machines measures 193nm and so it is wider (and has been wider) than the circuits that have been included in chips for years. That challenge — aiming the wavelength in way that makes it narrower than the circuits — helps explain why lithography equipment costs several million dollars.
Intel is considering using immersion lithography for 32nm chips, which will come out in 2009. According to Intel, extreme ultraviolet lithography is "more likely for 22nm" manufacturing, which starts in 2011.
Extreme ultraviolet lithography, which has a light source derived from laser beams developed for the Cold War-era Star Wars program, was slated to go into production on the 65nm process, but it has been delayed several times. In 2003, Intel said it was likely that it would use EUV for the 32nm process that starts in 2009.
Talkback
There seems to be a contradiction here: The article states that " Shrinking the transistors... reduces energy consumption..." But a few paragraphs down, we see that "The power consumption...of these chips will be extremely high"
So does making chips smaller increase or decrease power consumption?
Indeed the shrinking process reduces energy consumption for one transistor. But i think the are three parameters to take in account. First microprocessors tend to be more and more complex which means that the gain in space will be used to add more transistors.
Secondly, the density is higher, so you ve got an increased amount of heat on a smaller surface so thermal dissipation wil be more and more difficult. Lastly the decreased consumption has as main advantage to release less heat and so the potential to function in higher clock rates. This last parameter leaves the choice between better performance or less consumption,
but intelligent managment like Coolnquiet could partially resolve the problem.
So globally, processors should in the future be more power hungry, when used 100%.
Anybody to tell if that is a correct thinking?