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VLSI Implementation Of OFDM Modem
White Papers It then describes the VLSI implementation of OFDM in details. However, the same considerations would be helpful in implementing any OFDM system in VLSI. OFDM is a multi-carrier system where data bits are encoded to multiple sub-carriers, while...
[June 25, 2007, 2:25]
Low Power VLSI Architecture For Adaptive MAI Suppression In CDMA Using Multi-Stage Convergence Masking Vector
White Papers Multistage Convergence-Masking-Vector (CMV) is then proposed to combine with the clock gating as a dynamic power management scheme in the VLSI receiver architecture. This paper proposes a novel low power and low complexity multi-stage Parallel...
[October 6, 2005, 3:00]
Hermitian Optimization And Scalable VLSI Architecture For Circulant Approximated MIMO Equalizer In CDMA Downlink
White Papers This paper proposes a parallel and pipelined VLSI architecture for a circulant approximated equalizer for the MIMO-CDMA systems. The growing demands for broadband multimedia services, ubiquitous networking via mobile devices push the development of...
[October 6, 2005, 3:00]
Digital VLSI OFDM Transceiver Architecture For Wireless SoC Design
White Papers This paper presents the VLSI architecture of an OFDM baseband transceiver for wireless communications. The open-/closed-loop carrier recovery achieves the stepping frequency acquisition for high-band RF systems, and the proposed timing recovery...
[July 21, 2005, 6:00]
Good Technical Website For VLSI Chip Design Community
Forum A technical website dedicated to vlsi chip designers community, explanations about chip design flows/methodologies/design practices/design know how's/design checklist/architectural thought process. Worth your time to visit the site http://www...
[May 10, 2007, 15:17]
All About Vlsi Chip Design Concepts(http://www.vlsichipdesign.com)
Forum A 10 year old chip design expert is sharing his chip design expertise to vlsi chip design community. A portal(http://www.vlsichipdesign.com) where quality information on chip deisgn concepts/practices/design know how's steps involved in...
[May 10, 2007, 15:38]
An Efficient Circulant MIMO Equalizer For CDMA Downlink: Algorithm And VLSI Architecture
White Papers Wireless communication is experiencing radical advancement to support broadband multimedia services and ubiquitous networking via mobile devices. MIMO (Multiple Input Multiple Output) technology using multiple antennas at both the transmitter and...
[October 6, 2005, 3:00]
Chip Designers Voyage To Voltage Island
News Intel will also present several papers at the VLSI Symposium, outlining ways to increase the clock speed of its PC processors while containing leakage, the amount of power that slips past a transistor when it is turned off.
[June 10, 2002, 12:18]
Memory Makers Ride Out Downturn
News Right now, they are hurting bad enough to realise, 'We have to cut wafer starts,'" the number of silicon wafers pushed through assembly lines to make chips, said Risto Puhakka, a vice president at VLSI.
[August 8, 2001, 9:09]
OwlVision GDSII Viewer
Downloads OwlVision GDSII Viewer is used for viewing VLSI layout which is in GDSII/GDS2/GDS Stream format. It is implemented in Java programming language. Virtually, the program can be run on all of the platforms.
[May 19, 2006, 10:01]
Bluetooth - A New Low-Power Radio Interface Providing Short-Range Connectivity
White Papers In the past decades, progress in microelectronics and VLSI technology has fostered the widespread use of computing and communication applications in portable electronic devices. This paper reviews the Bluetooth technology, a new universal radio...
[September 15, 2005, 3:00]
Adaptive Sensing And Image Processing With A General-Purpose Pixel-Parallel Sensor/Processor Array Integrated Circuit
White Papers In this paper, a pixel-parallel image sensor/processor architecture with a fine-grain massively parallel SIMD analogue processor array is overviewed and the latest VLSI implementation, SCAMP-3 vision chip, comprising 128 × 128 array, fabricated...
[March 20, 2008, 0:02]
Intel's Floating Bodies
Blog Intel got on the phone on Monday to tell us chip-centric hacks about a bunch of papers the company was presenting to the 2008 Symposium on VLSI Technology in Hawaii. I've been trying to turn the notes from that briefing into a full news story, but...
[June 19, 2008, 8:03]
A 16-Bit Cordic Rotator For High-Speed Wireless LAN
White Papers The VLSI architecture of the proposed design eliminates the entire arithmetic hardware in the angle approximation datapath and reduces the number of iterations by 50% on an average. This paper proposes a novel 16-bit low power CORDIC rotator that...
[December 6, 2007, 0:01]
Low Complexity System-on-Chip Architectures Of Parallel-Residue-Compensation In CDMA Systems
White Papers In the second part, scalable VLSI architectures are implemented in an FPGA prototyping system with an efficient Precision-C based System-on-Chip (SOC) design methodology. This paper proposes a novel multi-stage Parallel-Residue-Compensation (PRC...
[October 11, 2005, 3:00]
Untimed-C Based SoC Architecture Design Space Exploration For 3G And Beyond Wireless Systems
White Papers This paper proposes an un-timed C/C++ level verification methodology that integrates key technologies for truly high-level VLSI modelling to keep pace with the explosive complexity of SoC designs in the 3G and beyond wireless communications.
[October 6, 2005, 3:00]
Handling And Profiling The Increasingly Large And Complex Memory Allocation Patterns Of The 64 Bit Era
White Papers BFM, the allocator presented in this paper, was motivated by such limitations observed in the processing of VLSI designs. The transition from 32 bit to 64 bit processors caused a sudden increase in memory use for a variety of workloads.
[April 12, 2005, 3:00]
Digital Wrappers - Realise Your Product
White Papers The current state of the art and the Standards are discussed and some information on the VLSI devices available in the market is given. As Optical Networks head past 10Gbps rates and on towards 40Gbps, two issues become apparent:1) Impairments at...
[January 7, 2004, 3:11]
Fast And Scalable Pattern Matching For Network Intrusion Detection Systems
White Papers The paper uses embedded on-chip memory blocks in FPGA/VLSI chips to construct Bloom filters which can suppress a large fraction of memory accesses and speed up string matching. High-speed packet content inspection and filtering devices rely on a...
[June 19, 2008, 1:01]
Intel Puts Tri-Gate Transistor On Fast Track
News The company presented a paper this week on the transistor, along with others on breakthroughs in incorporating radios onto chips, at the Very Large Scale Integration (VLSI) Symposium in Kyoto, Japan. In other VLSI papers, the chipmaker showed how...
[June 11, 2003, 7:54]
